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Dave James Avatar
Dave James responded to hishnash's comment in
2 Months ago
The AMD Vega chips might be the last big Radeon GPUs they ever makeThe AMD Vega chips might be the last big Radeon GPUs they ever make
hishnash Avatar
Creating an MCM style GPU that is transparent to the OS will be much harder than the CPU the reason for this is due to how operating systems have for a long time already been considering the concept of running tasks on the best core (based on the memory and other tasks this task needs)

However, in the GPU world, there is a very weak concept of memory ownership and even less of a concept of communication between threads. Without this "meta data" it would be very hard for the gpu to place tasks on cores that are local to each other.

to hamper this even more, unlike on a CPU, on a GPU when a task is waiting for some data it typically will block that core until it can continue. On a CPU even during the same cycle, those spare operations will be used up by the SMT/MT and on the next cycle, another talk will be set to run until the first is ready.

Thus with most current GPU compute tasks if you were just to run them without any changes on an MCM system you would have lots of cores being blocked waiting to talk to memory associated with other dies and you would get a really poor performance.

however AMD is working to improve this, HBCC brings cpu style memory ownership and management to the GPU. And there are parts of the Linux ROCm kernel (that will soon be mainlined) that bring real threading so that the GPU can be aware of parent kernels and shared memory between kernels.

However given this needs a patch to the Linux kernel and needs code to be recompiled i would not expect this to be as transparent as you say.Reply
Dave James Avatar

Yeah, HBCC could very well end up being one of those classic AMD 'fine wine' features that gets better with age. Having a large, high-speed memory system able to be used wherever it's needed ought to be a huge boon for an MCM system.


Also, graphics workloads are already incredibly parallel, and GPU silicon super modular, so multiple discrete chips in the same package, connected via the Infinity Fabric, should be capable of being accessed as one large mass of techie graphical goodness.


Well, so long as the schedulers do their jobs, I guess.

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